CPU86 on the
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web: www.ht-lab.com
Last Updated: 06-Jan-2007
This webpage describes the porting process of the CPU86 processor to the Drigmorn1 FPGA Development board. A ready made bitstream file with a debug monitor loaded in a memory image is available to quickly get the board up and running.
The CPU86 is an FPGA IP Core implementation of an 8088/8086 processor. The core is fully binary/instruction compatible with an 8086/8088 processor and can be implemented in any modern FPGA. The core is however not cycle or timing accurate. The CPU86 core consist of 3 functional blocks, an 8 bits Bus Interface Unit, a Data Path Unit and an Instruction Decoder Unit. In addition to the processor a 16550 compatible UART core from opencores.org
is added
to the design.
Drigmorn1 is an excellent small low-cost FPGA prototype board developed by Enterpoint Ltd in the UK. The board can be ordered with either a Xilinx Spartan-3E S100E or an S500E, the latter version is required for the CPU86.
Tools/Software/Hardware Requirements
- Drigmorn1 FPGA Development Board with the S500E FPGA
- CPU86 8088 Processor Design (includes Opencores 16550 UART)
- ISE or the free Xilinx ISE Webpack to Synthesize and Place&Route the design
- RS232 Interface (see note1 below)
- Serial communication program such as the excellent free Teraterm
Note1: Most PC's are no longer equipped with a serial port, however, USB to serial port cables are low-cost and seems to work fine (I got mine from ebay). After installing the driver the cable showed up as COM4.
Drigmorn1 CPU86 Design
Figure 1 shows the design ported to the Drigmorn1 board. In addition to the CPU86 processor a 16550 UART from opencores.org is used for communication with the host PC. The Drigmorn1 does not have any on-board memory, however, the Spartan-3E's internal blockrams can be used to create a 40K*8 SSRAM memory block (created using Coregen). The bottom 14K of this SSRAM memory block is pre-loaded with the MON88 debug monitor. The 256 byte ROM block is not used in this design and contains nothing more than a simple jump-to-mon88-after-reset program. The design is clocked at 40MHz from the on-board oscillator.
Fig1 - Drigmorn1 CPU86 Design
Ready Made Bitstream
If you want to quickly get the board up and running or simply want to test the Drigmorn1 board then download the ready-made bitstream file:
- Download the Drigmorn1 ready-made bitstream (CPU86 version 0.71, 98KB, zipped)
After loading the design the MON88 debugger's welcome message should appear on the serial port (38400,8,n,1). To reset the processor briefly connect Drigmorn's I/O pin2 and 3.
Fig2 - MON88 output
Hello World
As is customary, the first program to run is the so called "Hello World" program. The MON88 contains a number of BIOS calls which makes this an easy task. The code below prints a "*** Hello World ***" string on the terminal before jumping back to the monitor.
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Using the A86 (or any other) assembler, assemble the above program (see Software\asm directory):
A86.com +P0 hello.asm hello.bin
Convert the binary file to an Intel Hex file format (bin2hex.exe is located in the bin directory), this format is used by the MON88 loader:
bin2hex.exe hello.bin hello.hex -s 0380 -o 0100
Upload the program by issuing the MON88 Load command ('L') followed by uploading hello.hex as a textfile to the monitor. To execute the program issue the 'G' command followed by typing in "0100"
Fig3 - Loading a hex file, click to enlarge
Note : 0380 is the segment and 0100 is the IP address, thus the flat memory location were hello.hex is loaded to is 03900 (hex).
Building from scratch
To Synthesize and Place&Route the design ISE (or the free webpack) is required. This section will show the steps required to rebuild the design. Note that the full ISE is used for the sequence and screenshots below but this should be close to identical for the free WebPack edition.
1) Download the CPU86 Design and upzip to a suitable location
2) Invoke the ISE project navigator and create a new project for a Spartan3E XCS500E, CP132,-4
Fig4 - ISE Project settings, click to enlarge
3) On the Add Existing Source page add the following files:
- all VHDL files from web_cpu88\cpu86_rtl
- all VHDL files from web_cpu88\Opencores_UART
- Bootstrap_rtl.vhd from web_cpu88\Software\bootloader
- blk_mem_40K.vhd and top_struct.vhd from web_cpu88\drigmorn1\top_rtl
- and finally the DRIGMORN1.ucf file from web_cpu88\drigmorn1\ISE
You should have added a total of 46 files
4) Click next and finish
5) After creating the ISE project copy the blk_mem_40K.ngc file from the web_cpu88\drigmorn1\coregen directory to the ISE project directory (in my case to the web_cpu88\drigmorn1\ISE\Drigmorn86 directory).
6) Next, navigate to the Processes tab, right-mouse-click on the Generate Programming File and select run. This will run XST, P&R and finally generate the 278KByte top.bit bitstream file.
Before downloading the design check that all timing have been met. If this is not the case then try changing the XST synthesis effort and some of the implementation settings to high and/or timing driven and rerun all. Using ISE9.2+SP4 you should be able to achieve 40MHz using the default
settings.
7) To download the bitstream file, connect Drigmorn1 to the Xilinx download cable as shown in the figure below (note only USB download cable shown)
Fig5 - Xilinx USB Platform cable connected to Drigmorn1
8) Connect the RS232 to the PC and start a terminal communication program (e.g. Teraterm/Hyperterm). Configure the terminal for 38400bps, No Parity, 8 stopbits and no flow control (RTS/CTS are not used).
9) Go back to ISE and right-mouse-click (or double click) on the Configure Device (iMPACT) line and select run, then download the top.bit file.
Fig6 - Loading the bitstream
If all is OK you should see the MON88 welcome message on the terminal. Type 'H' to see the available commands. Navigate to the MON88 webpage for more info on how to use the debugger.
Using the Serial FLASH memory
Instead of using a download cable, Drigmorn1's can be configured from an on-board 4Mbit Serial Flash. This means that the CPU86 design is ready as soon as you power-up the board. To program the serial flash use the following procedure:
1) Power down the board and disconnect the Download Cable.
2) Connect the ribbon cable of the USB programmer to the second IDC connector as shown below.
Fig7 - SPI Flash Programming setup
3) Reconnect the USB programmer followed by connecting the power to Drigmorn1, make sure the Programmer's status LED is green (only on USB download cable).
4) Open the ISE project as created previously, right-mouse-click on the Generate PROM, ACE, or JTAG File option (under the Generate Programming File option) and select run (you can also double-click the option).
5) When iMPACT has loaded double click on the PROM File Formatter option. We need this option to create a file suitable for Drigmorn1's M25P40 serial flash.
6) On the next screen, select 3rd-Party SPI PROM and give it a name as shown below:
Fig8- iMPACT SPI Flash Programming file settings
7) Click on next and set the SPI PROM Density to 4M.
8) Click next, finish.
9) Next iMPACT will ask for the design bit file, select top.bit.
10) On the next screen select no for adding any additional devices.
11) The iMPACT screen should now show the SPI PROM connected to xc3s500e top.bit.
12) Where the SPI PROM file is shown, right-mouse-click and select Generate File... as shown below:
Fig9 - Generating the SPI Flash files
13) We now have the SPI Flash file (Drigmorn1_flash.mcs), next double click on the Direct SPI Configuration option.
13) On the right of the iMPACT screen it should state, "Right click to Add Device....", do this and select Add SPI Device...
14) Select the Drigmorn1_flash.mcs file (or whatever name you typed in under step 6).
15) Next change the PROM Part Name to M25P40 and click OK, the screen should show only the SPI PROM device.
14) right-mouse-click on the SPI PROM and select Program...
15) Assuming you got Program Succeeded, power down the Drigmorn1 board, remove the USB cable from the programmer and disconnect the ribbon cable.
16) Next power up the board and the CPU86 design should now be loaded from flash, as easy as that!
FAQ
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