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The HTL8088 is a pin and function compatible replacement for the iAPX88 (8088) processor. The processor can be used on any system that uses the Intel 8088 or compatible processor configured in the Minimum Mode (MN/MX must be strapped to Vcc). The minimum mode is used on most embedded systems but not on legacy IBM PC/XT and clones. Note: a few of the Maximum mode signals such as S2,S1,S0 and Lock are available on the HTL8088. The Queue Status signal QS1,QS0 however could not be implemented due to the difference in Bus Interface Unit design.  Replacing a commercial iAPX88 processor with an FPGA equivalent will result in bus timing differences. For this reason the WR, RD, DEN, READY and INTA signals are all controlled via a Finite State Machine (FSM) clocked at double the system clock speed.
The FSM allows signals to be fine tuned on a quarter of the system clock. Other signals can easily be added if required.  The HTL8088 is delivered on a Craignell-40 Component Replacement board from Enterpoint Ltd in the UK. The Craignell-40 contains a single LED which is used to indicate an error condition. The LED is connected to the CPU Bus Error signal and is asserted when the processor encounters an illegal instruction (e.g. an 80186/NEC V20 instruction) or when the HTL8088 is inserted in a Maximum Mode system.

Key Features

    Functional and Pin compatible with the industry standard iAPX88 Processor     Support Minimum Mode only     Written in technology independent VHDL     Enhanced Performance and higher clock speed possible     CPU core optimised for area and fits in a low-cost small FPGA     RTL source code available     Lowest cost commercial 8088 core

Area and Performance


Due to the relative low clock frequency of the iAPX88 processor (80C88-2 ran at 10MHz) the HTL8088 can be used to replace any commercial iAPX88 processor. Using the Craignell-40 Spartan-3E S500 FPGA the maximum clock frequency is around 40MHz. The area utilisation at this frequency is less than 55% with no blockrams used. The blockrams can be utilised to implement a custom BIOS or other bootstrap code, the total available blockram memory is 40KByte.  The Craignell also has an on-board oscillator which can be used in combination with a DCM to provide the system clock.
The HTL8088 is delivered on a Craignell-40 FPGA board from Enterpoint in the UK. The full source code can be supplied against additional cost.
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Minimum Mode iAPX88/86 Core